https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
--- Comment #8 from Arsen Arsenović <arsen at gcc dot gnu.org> --- (In reply to Alexander Monakov from comment #7) > I'm afraid hybrid CPUs with varying ISA feature sets are not practical for > the current ecosystem: you wouldn't be able to reschedule from a higher- to > lower-capable core. Not to mention scenarios like Mesa on-disk llvmpipe > shader cache. indeed (but I believe it did happen with Alder Lake already, by accident, with AVX512 on P-cores but not on E-cores). > "Always" probing all cores is a not a good idea (the compiler would have to > manually reschedule itself to all cores, of which there could be hundreds). > Plus, portable API for such probing across available cores does not exist > afaik. I'd consider this close enough to 'not possible' ;P my thinking was does cpuid provide a way to query cross-CPU (or CPU 'group' I suppose). if not, we're definitely better off just using a common, smaller cache size for intel hybrid CPUs (at least for now) > I think releasing an x86 hybrid CPU with varying capabilities across cores > would require substantial preparatory work in the kernel and likely in the > userland as well, so probably best to leave it until the time comes and > specifics of what can differ are known.
