[Bug target/111720] RISC-V: Ugly codegen in RVV

[juzhe.zhong at rivai dot ai via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111720

--- Comment #5 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
Similar issue in GCC 13.2:

https://godbolt.org/z/axKc4qj47

fn:
        lui     a5,%hi(.LANCHOR0)
        addi    a5,a5,%lo(.LANCHOR0)
        ld      a1,0(a5)
        ld      a2,8(a5)
        ld      a3,16(a5)
        ld      a4,24(a5)
        addi    sp,sp,-32
        sd      a1,0(sp)
        sd      a2,8(sp)
        sd      a3,16(sp)
        sd      a4,24(sp)
        li      a5,32
        vsetvli zero,a5,e8,m1,ta,ma
        vle8.v  v24,0(sp)
        vand.vi v24,v24,1
        vs1r.v  v24,0(a0)
        addi    sp,sp,32
        jr      ra


Multiple ld/sd. It seems that we didn't allow natural constant mem pool ????