https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110587
Roger Sayle <roger at nextmovesoftware dot com> changed:
What |Removed |Added
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CC| |roger at nextmovesoftware dot
com
See Also| |https://gcc.gnu.org/bugzill
| |a/show_bug.cgi?id=88873
--- Comment #9 from Roger Sayle <roger at nextmovesoftware dot com> ---
I'll check whether turning off the insvti_{low,high}part transformations during
lra_in_progress helps compile-time. I believe everytime reload encounters a
TI<->SSE SUBREG, the spill/reload generates two or three additional
instructions. I'm thinking that perhaps this should ideally be an UNSPEC, that
we can split after reload. As shown in PR 88873, we'd like SSE->TI->SSE to
avoid going via memory [where currently this happens twice]. It looks like
"interval" in pr28071.c suffers from the same x86 ABI issues [i.e. is placed in
scalar TImode, where ideally we'd like V2DI].
