https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109989
Maxim Blinov <maxim.blinov at imgtec dot com> changed:
What |Removed |Added
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CC| |maxim.blinov at imgtec dot com
--- Comment #1 from Maxim Blinov <maxim.blinov at imgtec dot com> ---
Hi all,
I bisected the failure to commit
3496ca4e656, "RISC-V: Add runtime invariant support".
GCC seems to treat the x array (`x[2]`) as a 2 integer vector, and loads it
into a DI mode register. However after the patch it neglects to honour the fact
that we only really want the lower 32 bits (which corresponds to `x[0]`) when
passing it as an argument to `__floatsisf`.
Before the commit, we generate
(insn 12 11 13 2 (set (reg:DI 10 a0)
(sign_extend:DI (subreg:SI (reg:DI 77) 0))) "../a.c":16:10 116
{extendsidi2}
(expr_list:REG_DEAD (reg:DI 77)
(nil)))
After the commit, we generate
(insn 12 11 13 2 (set (reg:SI 10 a0)
(subreg:SI (reg:DI 77) 0)) "../a.c":16:10 178 {*movsi_internal}
(expr_list:REG_DEAD (reg:DI 77)
(nil)))
which consequently gets removed as a useless instruction during the lra pass.
