[Bug target/109773] RISC-V: ICE when build RVV Intrinsic in Both GCC 13 && GCC 14

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109773

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kito Cheng <k...@gcc.gnu.org>:

https://gcc.gnu.org/g:69f3914414a303f0e2c8246e08925f90c207846c

commit r14-647-g69f3914414a303f0e2c8246e08925f90c207846c
Author: Juzhe-Zhong <juzhe.zh...@rivai.ai>
Date:   Tue May 9 10:19:34 2023 +0800

    RISC-V: Fix dead loop for user vsetvli intrinsic avl checking [PR109773]

    This patch is fix dead loop in vsetvl intrinsic avl checking.

    vsetvli->get_def () has vsetvli->get_def () has vsetvli.....
    Then it will keep looping in the vsetvli avl checking which is a dead loop.

            PR target/109773

    gcc/ChangeLog:

            * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New
function.
            (source_equal_p): Fix dead loop in vsetvl avl checking.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/vsetvl/pr109773-1.c: New test.
            * gcc.target/riscv/rvv/vsetvl/pr109773-2.c: New test.