https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106069
--- Comment #25 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org>
---
AIUI the rules are:
- GCC vector lane numbers always correspond to memory array indices.
For example, lane 0 always comes first in memory.
- On big-endian targets, vector loads and stores are assumed to put the
first memory element at the most significant end of the vector register.
So lane 0 refers to the most-significant register element on big-endian
targets and to the least-significant register element on little-endian
targets. So:
(vec_select:V4SI (reg:V4SI R)
[(const_int 2) (const_int 6) (const_int 3) (const_int 7)])
describes a different option on big-endian and little-endian but:
(vec_select:V4SI (mem:V4SI M)
[(const_int 2) (const_int 6) (const_int 3) (const_int 7)])
is endian-independent.
