[Bug target/97194] optimize vector element set/extract at variable position

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97194

--- Comment #24 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>:

https://gcc.gnu.org/g:20a2c8ace0ab56c147fd995432abd5e7cf89b0e3

commit r12-1563-g20a2c8ace0ab56c147fd995432abd5e7cf89b0e3
Author: Uros Bizjak <ubiz...@gmail.com>
Date:   Thu Jun 17 15:19:12 2021 +0200

    i386: Add variable vec_set for 64bit vectors [PR97194]

    To generate sane code a SSE4.1 variable PBLENDV instruction is needed.

    2021-06-17  Uroš Bizjak  <ubiz...@gmail.com>

    gcc/
            PR target/97194
            * config/i386/i386-expand.c (expand_vector_set_var):
            Handle V2FS mode remapping.  Pass TARGET_MMX_WITH_SSE to
            ix86_expand_vector_init_duplicate.
            (ix86_expand_vector_init_duplicate): Emit insv_1 for
            QImode for !TARGET_PARTIAL_REG_STALL.
            * config/i386/predicates.md (vec_setm_mmx_operand): New predicate.
            * config/i386/mmx.md (vec_setv2sf): Use vec_setm_mmx_operand
            as operand 2 predicate.  Call ix86_expand_vector_set_var
            for non-constant index operand.
            (vec_setv2si): Ditto.
            (vec_setv4hi): Ditto.
            (vec_setv8qi): ditto.

    gcc/testsuite/

            PR target/97194
            * gcc.target/i386/sse4_1-vec-set-1.c: New test.
            * gcc.target/i386/sse4_1-vec-set-2.c: ditto.