https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97194

--- Comment #25 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <u...@gcc.gnu.org>:

https://gcc.gnu.org/g:f65878178ab05180a5937f11f8fdb755678a82ce

commit r12-2085-gf65878178ab05180a5937f11f8fdb755678a82ce
Author: Uros Bizjak <ubiz...@gmail.com>
Date:   Tue Jul 6 19:27:34 2021 +0200

    i386: Add variable vec_set for 32bit vectors [PR97194]

    To generate sane code a SSE4.1 variable PBLENDV instruction is needed.

    Also enable variable vec_set through vec_setm_operand predicate
    for TARGET_SSE4_1 instead of TARGET_AVX2. 
ix86_expand_vector_init_duplicate
    is able to emulate vpbroadcast{b,w} with pxor/pshufb.

    2021-07-06  Uroš Bizjak  <ubiz...@gmail.com>

    gcc/
            PR target/97194
            * config/i386/predicates.md (vec_setm_operand): Enable
            register_operand for TARGET_SSE4_1.
            * config/i386/mmx.md (vec_setv2hi): Use vec_setm_operand
            as operand 2 predicate.  Call ix86_expand_vector_set_var
            for non-constant index operand.
            (vec_setv4qi): Use vec_setm_mmx_operand as operand 2 predicate.
            Call ix86_expand_vector_set_var for non-constant index operand.

    gcc/testsuite/

            PR target/97194
            * gcc.target/i386/sse4_1-vec-set-1a.c: New test.
            * gcc.target/i386/sse4_1-vec-set-2a.c: Ditto.

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