https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100333
--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Alex Coplan <acop...@gcc.gnu.org>: https://gcc.gnu.org/g:5b953740da1976d90d974055c6d825c509c6e654 commit r12-923-g5b953740da1976d90d974055c6d825c509c6e654 Author: Alex Coplan <alex.cop...@arm.com> Date: Wed May 19 15:52:45 2021 +0100 arm: Fix ICE with CMSE nonsecure calls on Armv8.1-M [PR100333] As the PR shows, we ICE shortly after expanding nonsecure calls for Armv8.1-M. For Armv8.1-M, we have TARGET_HAVE_FPCXT_CMSE. As it stands, the expander (arm.md:nonsecure_call_internal) moves the callee's address to a register (with copy_to_suggested_reg) only if !TARGET_HAVE_FPCXT_CMSE. However, looking at the pattern which the insn appears to be intended to match (thumb2.md:*nonsecure_call_reg_thumb2_fpcxt), it requires the callee's address to be in a register. This patch therefore just forces the callee's address into a register in the expander. gcc/ChangeLog: PR target/100333 * config/arm/arm.md (nonsecure_call_internal): Always ensure callee's address is in a register. gcc/testsuite/ChangeLog: PR target/100333 * gcc.target/arm/cmse/pr100333.c: New test.
