https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92953
--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> --- (In reply to Alexander Monakov from comment #2) > Well, the aarch64 backend does not implement subv<mode>4 pattern in the > first place, which would be required for efficient branchy code: > > foo: > subs w0, w0, w1 > b.vc .LBB0_2 > mvn w0, w0 > orr w0, w0, #0x1 > .LBB0_2: > ret > > This is preferable when the branch is predictable, thanks to shorter > dependency chain. Not much shorter and even if the branch is predictable it is worse. Also more likely you a lot going on during the time, so a microbenchmark is not going to prove to me it is worse. Also yes overflow might be considered the "exceptional" case but I have my doubts that is always true.
