https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92953
--- Comment #2 from Alexander Monakov <amonakov at gcc dot gnu.org> --- Well, the aarch64 backend does not implement subv<mode>4 pattern in the first place, which would be required for efficient branchy code: foo: subs w0, w0, w1 b.vc .LBB0_2 mvn w0, w0 orr w0, w0, #0x1 .LBB0_2: ret This is preferable when the branch is predictable, thanks to shorter dependency chain.