https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82518
--- Comment #24 from Aldy Hernandez <aldyh at gcc dot gnu.org> ---
(In reply to Richard Earnshaw from comment #22)
> (In reply to Nick Clifton from comment #21)
> > Hi Aldy,
> >
> > >>> instruction. :-( Looking at the code in Handle_Store_Double() in
> > >>> sim/arm/armemu.c, I think that the reason is probably because the
> > >>> address
> > >>> for the store is not double word aligned. Which leads me to wonder,
> > >>> what value is stored in r5 when the STRD instruction is being executed ?
> >
> >
> > >> => 0x8c24 <initialise_monitor_handles+156>: strd r2, [r5, #12]
> > >> (gdb) info reg r5
> > >> r5 0x1b6e8 112360
> >
> > >> ...which is 64 bit aligned.
> >
> > But, as you have just discovered, (r5 + 12) is not 64-bit aligned...
>
> But from ARMv7 onwards it only has to be 4-byte aligned, which it is. And
> this code was build for cortex-a9, which is ARMv7-a.
(In reply to Richard Earnshaw from comment #22)
> (In reply to Nick Clifton from comment #21)
> > Hi Aldy,
> >
> > >>> instruction. :-( Looking at the code in Handle_Store_Double() in
> > >>> sim/arm/armemu.c, I think that the reason is probably because the
> > >>> address
> > >>> for the store is not double word aligned. Which leads me to wonder,
> > >>> what value is stored in r5 when the STRD instruction is being executed ?
> >
> >
> > >> => 0x8c24 <initialise_monitor_handles+156>: strd r2, [r5, #12]
> > >> (gdb) info reg r5
> > >> r5 0x1b6e8 112360
> >
> > >> ...which is 64 bit aligned.
> >
> > But, as you have just discovered, (r5 + 12) is not 64-bit aligned...
>
> But from ARMv7 onwards it only has to be 4-byte aligned, which it is. And
> this code was build for cortex-a9, which is ARMv7-a.
In that case, unless I'm missing something, the simulator looks wrong.
The unalignment occurs in initialise_monitor_files() here:
openfiles[0].handle = monitor_stdin;
(gdb) p &openfiles[0].handle
$14 = (int *) 0x1b6f4 <openfiles>
(gdb) p/x (unsigned int)$14 % 4
$15 = 0x0
(gdb) p/x (unsigned int)$14 % 8
$16 = 0x4
So openfiles[0].handle is aligned to 4 bytes, but not to 8. Forthat matter,
&openfiles is 4 byte aligned only. And Richard says that is ok.
So, why is Handle_Store_Double() unilaterally barfing on non 64-bit alignment?
/* The address must be aligned on a 8 byte boundary. */
if (addr & 0x7)
{
#ifdef ABORTS
ARMul_DATAABORT (addr);
#else
ARMul_UndefInstr (state, instr);
#endif
return;
}
