https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69454
--- Comment #23 from H.J. Lu <hjl.tools at gmail dot com> --- (In reply to Ilya Enkovich from comment #22) > (In reply to H.J. Lu from comment #21) > > In another word, STV needs 128-bit aligned stack only when it generates > > 12-bit vector instructions. > > STV never generates such instructions. But RA may spill SSE registers and > aligned moves are used for that. I actually expected RA to fix-up alignment > requirements or even use DI spills/fills (since we never use full register > for STV) but it doesn't happen. RA should be OK. We have addressed all RA issues on Linux when we implemented stack realignment. RA should only spill/fill the part of registers which is used.
