https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212
--- Comment #71 from Oleg Endo <olegendo at gcc dot gnu.org> --- (In reply to Kazumoto Kojima from comment #69) > the code size regression for CSiBE from non LRA is reduced to 0.59%. > Looking at the improved cases, the extra save/restore insns to/from > stack disappear. I guess that SH has not enough numbers of the hard > registers to make the equiv substitution win in the size and the speed > on average working sets. It looks the pseudos produced to hold > the equiv values can't get hard registers for bad cases and end up > memory save/restore insns which make the code worse. I don't know the details and maybe I'm totally off here ... LRA is being used for ARM and there are almost the same amount of GP registers available on ARM than on SH. So either on ARM nobody has checked for such regressions, or there's something else going wrong or missing on SH? Or is it maybe really that SH R0-ness thing that makes everything work (or not work) totally different?
