http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50106
Bug #: 50106
Summary: [ARM] Wrong code with -march=armv5t -mthumb -Os
Classification: Unclassified
Product: gcc
Version: 4.6.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
AssignedTo: [email protected]
ReportedBy: [email protected]
Target: arm-rtemseabi4.11
Created attachment 25028
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25028
Sample code.
Command line:
arm-rtemseabi4.11-g++ -march=armv5t -mthumb -Os -S compiler1.test.ii -o
compiler1.test.eabi.Os.s
arm-rtemseabi4.11-g++ -march=armv5t -mthumb -O2 -S compiler1.test.ii -o
compiler1.test.eabi.O2.s
Relevant function:
extern _TestStruct _GetIDS(unsigned int Index)
{
if (Index < _LIST_SIZE) {
return _List[Index];
} else {
return _List[0];
}
}
Partial content of compiler1.test.eabi.Os.s with comments:
.text
.align 1
.global _Z7_GetIDSj
.code 16
.thumb_func
.type _Z7_GetIDSj, %function
_Z7_GetIDSj:
.fnstart
.LFB0:
.save {r0, r1, r2, lr}
push {r0, r1, r2, lr}
Why do we save the volatile registers r0, r1, r2 here?
ldr r3, .L4
ldr r1, .L4+4
ldr r3, [r3]
cmp r0, r3
bcs .L2
lsl r0, r0, #1
add r1, r1, r0
.L2:
mov r2, #2
add r0, sp, #4
bl memcpy
Here we copy two bytes from the table into the stack.
add r3, sp, #4
ldrb r0, [r3, #1]
ldrb r2, [r3]
Here we copy two bytes from the stack into two registers.
lsl r0, r0, #8
orr r0, r2
Here we combine the two registers into one.
@ sp needed for prologue
pop {r0, r1, r2, pc}
Here we overwrite our result (r0) with the value of r0 at the function entry.
.L5:
.align 2
.L4:
.word .LANCHOR0
.word .LANCHOR1
With -O2 the problem vanishes (because we don't use memcpy()).
