http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45834
Summary: Redundant inter-loop edges in DDG
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: e...@il.ibm.com
CC: b...@broadcom.com
Despite the patch to check alias sets in add_inter_loop_mem_dep function
(http://gcc.gnu.org/ml/gcc-patches/2009-01/msg00789.html); inter-loop edges are
created in the ddg of the loop below.
When changing the data types to int the edges are avoided.
Tested on PowerPC using GCC -r164646 with the flags:
-O3 -fmodulo-sched -fdump-rtl-sms -fmodulo-sched-allow-regmoves -c
-fno-auto-inc-dec
void
foo(unsigned char * __restrict__ dst,
unsigned char * __restrict__ src1,
unsigned char * __restrict__ src2)
{
int x, y;
for( x = 0; x < 100; x+=1)
{
dst[x] = ( src1[x] * src2[x]);
}
}
Snippet from SMS dump file which shows the edges:
SMS loop num: 1, file: test.c, line: 7
Node num: 0
(insn 62 61 63 3 (set (reg:QI 189 [ MEM[base: src2_11(D), index: ivtmp.15_29,
offset: 0B] ])
(mem:QI (plus:DI (reg/v/f:DI 188 [ src2 ])
(reg:DI 185 [ ivtmp.15 ])) [0 MEM[base: src2_11(D), index:
ivtmp.15_29, offset: 0B]+0 S1 A8])) test.c:10 395 {*movqi_internal}
(nil))
OUT ARCS: [62 -(T,2,0)-> 64]
IN ARCS: [66 -(T,3,1)-> 62] [65 -(T,14,1)-> 62]
Node num: 1
(insn 63 62 64 3 (set (reg:QI 190 [ MEM[base: src1_7(D), index: ivtmp.15_29,
offset: 0B] ])
(mem:QI (plus:DI (reg/v/f:DI 187 [ src1 ])
(reg:DI 185 [ ivtmp.15 ])) [0 MEM[base: src1_7(D), index:
ivtmp.15_29, offset: 0B]+0 S1 A8])) test.c:10 395 {*movqi_internal}
(nil))
OUT ARCS: [63 -(T,2,0)-> 64]
IN ARCS: [66 -(T,3,1)-> 63] [65 -(T,14,1)-> 63]
...
Node num: 3
(insn 65 64 66 3 (set (mem:QI (plus:DI (reg/v/f:DI 186 [ dst ])
(reg:DI 185 [ ivtmp.15 ])) [0 MEM[base: dst_4(D), index:
ivtmp.15_29, offset: 0B]+0 S1 A8])
(subreg:QI (reg:SI 191) 3)) test.c:10 395 {*movqi_internal}
(expr_list:REG_DEAD (reg:SI 191)
(nil)))
OUT ARCS: [65 -(O,0,0)-> 80] [65 -(T,14,1)-> 63] [65 -(T,14,1)-> 62]
IN ARCS: [66 -(T,3,1)-> 65] [64 -(T,9,0)-> 65]
