------- Comment #2 from ramana at gcc dot gnu dot org 2009-10-15 07:57 -------
(In reply to comment #0)
> Compile the attached source code with options -Os -march=armv5te -mthumb, gcc
> generates:
>
> push {lr}
> ldr r3, [r0]
> cmp r3, #0 // B
> bne .L3
> ldr r3, [r0, #4]
> b .L2
> .L3:
> mov r3, #0 // A
> .L2:
> ldr r2, [r0, #8]
> @ sp needed for prologue
> ldr r0, [r2]
> add r0, r3, r0
> pop {pc}
>
> Instruction A can be moved before instruction B, which should be handled by
> ifcvt.c:find_if_case_2. Notice the following code in find_if_header:
Surely you want A moved before the load rather than just before the comparison
? If you move the move after the load you've destroyed the value you've loaded
and the comparison is redundant.
>
> Target ARM has conditional execution capability, but thumb actually can't do
> conditional execution. Do we have any method to let the compiler know this?
Note that this is relevant only for Thumb1 and not for Thumb2. Thumb2 has
conditional code generation and GCC does make an effort to generate conditional
code for it.
Can we work around this by undef'ing HAVE_conditional_execution in the backend
headers and defining this to TARGET_THUMB1 ?
cheers
Ramana
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41705
