Trying to peg C intrinsic variables (for ARM/NEON) to a specific 128-bit
register (e.g. q0-q15) does not work at all. For example,
register int16x8_t v0 asm ("q0"); // q0=d0-d1
register int16x8_t v1 asm ("q1"); // q1=d2-d3
is totally ignored yet compiles without warning. If I try the front door,
int16x8x2_t v8;
asm volatile (
"vmulq.s16 q2, %1, %2\n\t"
"vshrn.i16 %0, q2, #13\n\t"
: "=r" (v0)
: "r" (v8.val[0]), "r" (v8.val[1])
: "d4", "d5", "q2"
);
it tries to use r registers. See the error:
/tmp/ccmAG4Ya.s:321: Error: Neon double or quad precision register
expected -
`vmulq.s16 q2,r2,r8'
/tmp/ccmAG4Ya.s:322: Error: bad instruction
`vshln.i16 r2,q2,#1'
This makes mixing C and inline assembly nearly impossible for NEON code.
--
Summary: Mixing ARM/NEON intrinsic variables and inline assembly
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: major
Priority: P3
Component: inline-asm
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: gmcgrath at yahoo dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41538
