------- Comment #27 from bonzini at gnu dot org 2007-08-29 14:11 -------
> Not all basic blocks have all 4 x86_64 regular_block_artificial_regs registers
> set in DF_LR_IN and so oring this in causes infinite loop, as
> process_dce_block
> always returns something changed.
If so, your previous patch would be correct. But in that case I wonder:
1) what is the purpose df_simulate_fixup_sets in df_simulate_one_insn_backwards
(and df_simulate_one_insn_forwards, FWIW). Doing the OR for every insn is
clearly wrong, if it doesn't result in the IN set equal to DF_LR_IN.
2) why is the code marked as
/* Process the artificial defs and uses at the bottom of the block. */
in dce_process_block slightly different from df_simulate_artificial_refs_at_end
and df_simulate_artificial_refs_at_top.
3) whether the code you added in dce_process_block should go in
df_simulate_artificial_refs_at_end actually.
Post your first patch, I will try to sort out this mess next week and may ask
you to regtest a patch on at least x86_64 and ia64. In the meanwhile I CCed
Zadeck so that he can answer these questions...
--
bonzini at gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |zadeck at gcc dot gnu dot
| |org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32758
