------- Comment #7 from amodra at bigpond dot net dot au 2005-11-24 06:51
-------
I'm not surprised that reducing this testcase isn't easy. Register pressure is
needed to trigger the bug. The problem is that in
(insn:HI 2761 3601 2769 279 wmadec.c:1117 (set (reg:V4SF 280 [ vect_var_.655 ])
(mem:V4SF (and:SI (plus:SI (reg/f:SI 1824)
(reg:SI 284 [ base_off.641 ]))
(const_int -16 [0xfffffffffffffff0])) [4 S16 A128])) 628
{altivec_lvx_v4sf} (insn_list:REG_DEP_TRUE 2757 (nil))
(expr_list:REG_DEAD (reg:SI 284 [ base_off.641 ])
(nil)))
reg 1824 doesn't get a hard register, so is replaced with a stack slot
(insn:HI 2761 3601 2769 279 wmadec.c:1117 (set (reg:V4SF 89 12 [orig:280
vect_var_.655 ] [280])
(mem:V4SF (and:SI (plus:SI (plus:SI (reg/f:SI 1 1)
(reg:SI 11 11 [orig:284 base_off.641 ] [284]))
(const_int 16512 [0x4080]))
(const_int -16 [0xfffffffffffffff0])) [4 S16 A128])) 628
{altivec_lvx_v4sf} (insn_list:REG_DEP_TRUE 2757 (nil))
(expr_list:REG_DEAD (reg:SI 11 11 [orig:284 base_off.641 ] [284])
(nil)))
reload just tries to put the mem address, including the AND, into a reg. It
needs to be taught that the AND should stay with the insn. The real address is
the part inside the AND.
--
amodra at bigpond dot net dot au changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|middle-end |tree-optimization
Target Milestone|4.1.0 |---
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24997
