Change order of SMMU clocks to match the schema.

Signed-off-by: Dmitry Baryshkov <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 31 +++++++++++++--------------
 1 file changed, 15 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi 
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index c0a2baffa49d..9331327678d8 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -2205,9 +2205,9 @@ adreno_smmu: iommu@b40000 {
                                     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
                        #iommu-cells = <1>;
 
-                       clocks = <&mmcc GPU_AHB_CLK>,
-                                <&gcc GCC_MMSS_BIMC_GFX_CLK>;
-                       clock-names = "iface", "bus";
+                       clocks = <&gcc GCC_MMSS_BIMC_GFX_CLK>,
+                                <&mmcc GPU_AHB_CLK>;
+                       clock-names = "bus", "iface";
 
                        power-domains = <&mmcc GPU_GDSC>;
                };
@@ -2272,9 +2272,9 @@ mdp_smmu: iommu@d00000 {
                                     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>;
                        #iommu-cells = <1>;
-                       clocks = <&mmcc SMMU_MDP_AHB_CLK>,
-                                <&mmcc SMMU_MDP_AXI_CLK>;
-                       clock-names = "iface", "bus";
+                       clocks = <&mmcc SMMU_MDP_AXI_CLK>,
+                                <&mmcc SMMU_MDP_AHB_CLK>;
+                       clock-names = "bus", "iface";
 
                        power-domains = <&mmcc MDSS_GDSC>;
                };
@@ -2292,9 +2292,9 @@ venus_smmu: iommu@d40000 {
                                     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
                        power-domains = <&mmcc MMAGIC_VIDEO_GDSC>;
-                       clocks = <&mmcc SMMU_VIDEO_AHB_CLK>,
-                                <&mmcc SMMU_VIDEO_AXI_CLK>;
-                       clock-names = "iface", "bus";
+                       clocks = <&mmcc SMMU_VIDEO_AXI_CLK>,
+                                <&mmcc SMMU_VIDEO_AHB_CLK>;
+                       clock-names = "bus", "iface";
                        #iommu-cells = <1>;
                        status = "okay";
                };
@@ -2308,10 +2308,9 @@ vfe_smmu: iommu@da0000 {
                                     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>;
                        power-domains = <&mmcc MMAGIC_CAMSS_GDSC>;
-                       clocks = <&mmcc SMMU_VFE_AHB_CLK>,
-                                <&mmcc SMMU_VFE_AXI_CLK>;
-                       clock-names = "iface",
-                                     "bus";
+                       clocks = <&mmcc SMMU_VFE_AXI_CLK>,
+                                <&mmcc SMMU_VFE_AHB_CLK>;
+                       clock-names = "bus", "iface";
                        #iommu-cells = <1>;
                };
 
@@ -2336,9 +2335,9 @@ lpass_q6_smmu: iommu@1600000 {
                                <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
                                <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>;
 
-                       clocks = <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>,
-                                <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>;
-                       clock-names = "iface", "bus";
+                       clocks = <&gcc GCC_HLOS1_VOTE_LPASS_ADSP_SMMU_CLK>,
+                                <&gcc GCC_HLOS1_VOTE_LPASS_CORE_SMMU_CLK>;
+                       clock-names = "bus", "iface";
                };
 
                slpi_pil: remoteproc@1c00000 {
-- 
2.35.1

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