:> I can't think of a single case where the stack isn't inherently
:> 4-byte aligned already, whether you use the option or not.
:
:It's more a case of overriding the new behaviour of gcc to align the
:stack on 16-byte boundaries by default (for performance reasons for the
:PIII SIMD instructions, IIRC)
:
:> To whomever added the option: Did you actually test to see that
:> this option resulted in an improvement? If not, I recommend removing
:> it. It sounds like unnecessary extra junk to me.
:
:For the bootcode the option is necessary. It does remove a lot of "subl
:$..,%esp" instructions that bloated the code, which in turn prevented
:boot2 to build. It's not necessary for kernel/module builds. But the
:option does prevent a lot of unnecessary alignment instructions in the
:code...
:
:Maybe -mpreferred-stack-boundary=2 should be the default so that we
:don't need the option in the general case. Overriding this in certain
:cases, can be considered an optimisation...
:
:--
:Marcel Moolenaar mailto:[EMAIL PROTECTED]
SIMD? It sounds like they are trying to enforce alignment against
the cache line size in general. I can sorta see how it might help,
but it's a huge waste of space!
-rwxr-xr-x 1 root wheel 2051069 Nov 29 17:59 kernel EGCS
-rwxr-xr-x 1 root wheel 2081364 Nov 30 10:18 kernel NEW GCC
-rwxr-xr-x 1 root wheel 2008468 Nov 30 10:15 kernel NEW GCC w/ -m
The new GCC does a better job verses the old EGCS if you use the
option to limit alignment to 4 bytes. If you do not use the option
the 16 byte alignment adds 70K to the size of the kernel.
All I can say to that is "bleh". The real question is whether performance
is actually improved significantly or not. If not, I'd sent a nasty email
to the gcc folks :-)
The extra subl's are not going to cost anything in regards to cpu so
the real question is whether the cache line alignment boosts performance.
-Matt
Matthew Dillon
<[EMAIL PROTECTED]>
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