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commit 98f2aba45ab794a17fa0202898b35b6b22f921be Author: Niklas Haas <[email protected]> AuthorDate: Wed Mar 18 18:14:32 2026 +0100 Commit: Niklas Haas <[email protected]> CommitDate: Sat Mar 28 18:50:14 2026 +0100 swscale/x86/ops: add bxq/yq variants of bxd/yd Sometimes, bxd/yd need to be passed directly to a 64-bit memory operand, which requires the use of the 64-bit variants. Since we can't guarantee that the high bits are correctly zero'd on function entry, add an explicit movsxd instruction to cover the first loop iteration. Signed-off-by: Niklas Haas <[email protected]> --- libswscale/x86/ops_common.asm | 2 ++ libswscale/x86/ops_int.asm | 2 ++ 2 files changed, 4 insertions(+) diff --git a/libswscale/x86/ops_common.asm b/libswscale/x86/ops_common.asm index b8fd78c9b6..0961d74a51 100644 --- a/libswscale/x86/ops_common.asm +++ b/libswscale/x86/ops_common.asm @@ -242,7 +242,9 @@ endstruc %define execq r0q %define implq r1q %define bxd r2d +%define bxq r2q %define yd r3d +%define yq r3q ; Extra registers for free use by kernels, not saved between ops %define tmp0q r4q diff --git a/libswscale/x86/ops_int.asm b/libswscale/x86/ops_int.asm index 61ade4cf7f..d3b0c0de31 100644 --- a/libswscale/x86/ops_int.asm +++ b/libswscale/x86/ops_int.asm @@ -81,6 +81,8 @@ cglobal sws_process%1_x86, 6, 7 + 2 * %1, 16 add implq, SwsOpImpl.next mov [rsp + 0], tmp0q mov [rsp + 8], implq + movsxdifnidn bxq, bxd + movsxdifnidn yq, yd ; load plane pointers mov in0q, [execq + SwsOpExec.in0] _______________________________________________ ffmpeg-cvslog mailing list -- [email protected] To unsubscribe send an email to [email protected]
