On Wed, Jul 11, 2018 at 07:51:05PM +1000, NeilBrown wrote:
> On Wed, Jul 11 2018, Greg KH wrote:
>
> > On Wed, Jul 11, 2018 at 10:29:43AM +0300, Dan Carpenter wrote:
> >> On Tue, Jul 10, 2018 at 09:33:47PM +0200, Sergio Paracuellos wrote:
> >> > +static int mt7621_pcie_parse_dt(struct mt7621_pcie_port *port)
> >> > +{
> >> > + struct device *dev = port->dev;
> >> > + struct device_node *node = dev->of_node;
> >> > + struct resource regs;
> >> > + const char *type;
> >> > + int err;
> >> > +
> >> > + type = of_get_property(node, "device_type", NULL);
> >> > + if (!type || strcmp(type, "pci")) {
> >>
> >> Instead of testing for pci, can you test for pcie?
> >
> > Does this platform support pcie?
>
> Yes, the platform has 3 pcie ports.
>
> I hope to test these patches by Saturday morning (GMT+10). I'll report
> any problems, or success.
Thanks, Neil. That would be awesome.
>
> Thanks,
> NeilBrown
Best regards,
Sergio Paracuellos
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