On Sat, 2008-09-13 at 18:46 -0700, Keith Packard wrote: > Reading any interrupt registers before masking out interrupts causes all > kinds of MSI interrupt failure. New order is: > > mask out interrupts > read iir > read pipe registers (if interrupt signalled) > write pipe registers > write iir > mask in interrupts > posting read > > Also, this patch changes the vblank code to use the vblank signal available > in the pipe status registers instead of the simple vblank interrupt. On 965, > the simple vblank interrupt comes too late and can cause visible tearing. > Hi Keith, I applied this patch with a the changes necessary to merge it with Dave Airlie's drm-rawhide-intel branch (by hand; since it seems to be corrupt). This has fixed the problems I (and others, as reported on IRC) have been experiencing with EXA acceleration, and also fixes OpenGL sync to vblank.
I'm yet to test it with UXA, and KMS. But this is a the first time GEM has been as function as the TTM version prior to the GEM merge. ------------------------------------------------------------------------- This SF.Net email is sponsored by the Moblin Your Move Developer's challenge Build the coolest Linux based applications with Moblin SDK & win great prizes Grand prize is a trip for two to an Open Source event anywhere in the world http://moblin-contest.org/redirect.php?banner_id=100&url=/ -- _______________________________________________ Dri-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-devel
