> 06:00.0 VGA compatible controller: ATI Technologies Inc RV370 5B60 [Radeon > X300 (PCIE)] (prog-if 00 [VGA]) > Subsystem: VISIONTEK Unknown device 0401 > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- > Stepping- SERR- FastB2B- > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- > <MAbort- >SERR- <PERR- > Latency: 0, Cache Line Size: 16 bytes > Interrupt: pin A routed to IRQ 16 > Region 0: Memory at e0000000 (32-bit, prefetchable) [size=128M] > Region 1: I/O ports at c800 [size=256] > Region 2: Memory at ff9f0000 (32-bit, non-prefetchable) [size=64K] > Expansion ROM at ff9c0000 [disabled] [size=128K] > Capabilities: <access denied> > 00: 02 10 60 5b 07 00 10 00 00 00 00 03 04 00 80 00 > 10: 08 00 00 e0 01 c8 00 00 00 00 9f ff 00 00 00 00 > 20: 00 00 00 00 00 00 00 00 00 00 00 00 45 15 01 04 > 30: 00 00 9c ff 50 00 00 00 00 00 00 00 0a 01 00 00
Does it always put the PCI stuff into the top 1GB address range, where does the final 1GB of memory go? or does lspci look diffferent with 4GBs in? Dave. ------------------------------------------------------------------------- Take Surveys. Earn Cash. Influence the Future of IT Join SourceForge.net's Techsay panel and you'll get the chance to share your opinions on IT & business topics through brief surveys - and earn cash http://www.techsay.com/default.php?page=join.php&p=sourceforge&CID=DEVDEV -- _______________________________________________ Dri-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/dri-devel
