Hi! I've been working on adding stereo support for radeon/r200 driver recently. I have several questions mainly about kernel side and interrupts.
1) About CP. As I understand it it's some kind of queue for commands. So, is there such posibility that if I write some value into register using it and after that another value is written using RADEON_WRITE the second value will be overwritten by first one? Is it flushed on context change? For example when server grabs a lock after client. 2) Can I block radeon interrupt (swi and vbl) and if so how can I do it? What I mean is to block them for a while and not to loose any. 3)Is touching SAREA from interrupt handler (radeon_dma_service) a bad idea? 4)Is touching the RING from interrupt handler a bad idea? Thanks Jacek Rosik ------------------------------------------------------- This sf.net email is sponsored by:ThinkGeek Welcome to geek heaven. http://thinkgeek.com/sf _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
