On Sam, 2003-02-22 at 23:04, Leif Delgass wrote: > On 22 Feb 2003, Michel D�nzer wrote: > > > On Sam, 2003-02-22 at 22:16, Leif Delgass wrote: > > > On 22 Feb 2003, Michel D�nzer wrote: > > > > > > > > I do wonder if the register writes in RADEONSetCursorPosition() could > > > > interfere with the CP to cause FIFO overflows. Does anyone have an idea > > > > how to determine whether writes to certain registers go through the > > > > FIFO? I asked ATI devrel about this but didn't get a reply. :( The only > > > > indication that these might not is that I'd expect it to cause problems > > > > much more frequently if they did. > > > > > > IIRC, at least on mach64, hardware cursor position updates don't go > > > through the draw engine FIFO > > > > Good, that makes a lot of sense of course. > > > > > (any registers below dword offset 0x040 don't use the FIFO), > > > > Where did you find this information? Have you found anything similar > > about Radeons anywhere? > > It's in the register reference and programmer's guide. I don't have docs > on Radeons, so I don't know if there is a similar convention there.
I can't find any in the docs I have unfortunately. The SDK PDF says 'The file REGDEF.H specifically outlines the registers are "FIFOed", and identifies the registers that can be read directly', but I don't see any such information in that file either. :( Maybe I'm blind... -- Earthling Michel D�nzer (MrCooper)/ Debian GNU/Linux (powerpc) developer XFree86 and DRI project member / CS student, Free Software enthusiast ------------------------------------------------------- This SF.net email is sponsored by: SlickEdit Inc. Develop an edge. The most comprehensive and flexible code editor you can use. Code faster. C/C++, C#, Java, HTML, XML, many more. FREE 30-Day Trial. www.slickedit.com/sourceforge _______________________________________________ Dri-devel mailing list [EMAIL PROTECTED] https://lists.sourceforge.net/lists/listinfo/dri-devel
