Linus Torvalds wrote:
>
> On Fri, 31 May 2002, Tim Smith wrote:
>
>>I seem to be observing the behaviour that if, on entry to do_cp_idle() the
>>FIFO is not empty already, it never will be empty and the whole thing goes
>>pear shaped. Thus, if a big collection of commands is just followed by more
>>commands this doesn't seem to cause a problem, but if a big collection of
>>commands is followed very quickly by a cp_idle(), it goes funny. This may
>>of course be Yet Another Symptom, of which I seem to have chased many :-)
>>
>
> How about trying to change "radeon_do_wait_for_idle()" to _first_ wait for
> the RBBM to become unactive, _then_ wait for the fifo to drain, and only
> after that do the pixcache flush?
>
> If it is true that the ring buffer commands will fill up the FIFO (which
> sounds perfectly sane to me), then that implies that anybody who waits for
> the FIFO to empty should first wait for RBBM_ACTIVE to go away.
>
> (That also obviously implies that the ring-buffer-head write must not
> be using the FIFO - so you don't need to wait for the fifo to drain in
> order to add stuff to the ring buffer - but that does all make sense).
>
> So right now our problem _may_ be that we do this in
> radeon_do_wait_for_idle():
>
> - wait for the FIFO to drain
>
> - ring buffer still active, it re-fills the fifo, the engine is still
> busy
OK, from the docs the RADEON_RBBM_ACTIVE bit is defined as:
- 2D engine busy -or-
- 3D engine busy -or-
- Command fifo not empty -or-
- CP microcode engine busy -or-
- Command Stream Queue not empty -or-
- Ring Buffer not empty.
which is pretty comprehensive. The other bits in the RBBM register are those
conditions split up, plus a couple of additional 3d-backend busy flags.
So by this reading, the initial call to radeon_do_wait_for_fifo is redundant,
as the second loop on RADEON_RBBM_ACTIVE should cover that condition as well
as the ring.
> - now we wait for the ring buffer to go away, and then do the
> pixcache_flush(), but since the FIFO has filled up, the actual graphics
> engine (as opposed to the ring buffer engine) is still busy, so we
> flush the pixcache and in particular we return from
> "radeon_do_cp_idle()" while the engine isn't really idle at all.
It would be worth checking if the fifo has become full again when we call
pixcache_flush, but it seems unlikely.
Keith
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