> Subject: [v7 13/15] drm/i915/display: Add registers for 3D LUT

This needs to be /color
Other than that
Reviewed-by: Suraj Kandpal <[email protected]>

> 
> From: Chaitanya Kumar Borah <[email protected]>
> 
> Add registers needed to program 3D LUT
> 
> v2:
> - Follow convention documented in i915_reg.h (Jani)
> - Removing space in trailer (Suraj)
> - Move registers to intel_color_regs.h
> 
> BSpec: 69378, 69379, 69380
> Signed-off-by: Chaitanya Kumar Borah <[email protected]>
> Signed-off-by: Uma Shankar <[email protected]>
> ---
>  .../gpu/drm/i915/display/intel_color_regs.h   | 29 +++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color_regs.h
> b/drivers/gpu/drm/i915/display/intel_color_regs.h
> index 8eb643cfead7..c370b6029369 100644
> --- a/drivers/gpu/drm/i915/display/intel_color_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_color_regs.h
> @@ -316,4 +316,33 @@
>  #define   SKL_BOTTOM_COLOR_CSC_ENABLE                REG_BIT(30)
>  #define SKL_BOTTOM_COLOR(pipe)               _MMIO_PIPE(pipe,
> _SKL_BOTTOM_COLOR_A, _SKL_BOTTOM_COLOR_B)
> 
> +/* 3D LUT */
> +#define _LUT_3D_CTL_A                0x490A4
> +#define _LUT_3D_CTL_B                0x491A4
> +#define LUT_3D_CTL(pipe)     _MMIO_PIPE(pipe, _LUT_3D_CTL_A,
> _LUT_3D_CTL_B)
> +#define   LUT_3D_ENABLE                      REG_BIT(31)
> +#define   LUT_3D_READY                       REG_BIT(30)
> +#define   LUT_3D_BINDING_MASK                REG_GENMASK(23, 22)
> +#define   LUT_3D_BIND_PIPE
>       REG_FIELD_PREP(LUT_3D_BINDING_MASK, 0)
> +#define   LUT_3D_BIND_PLANE_1
>       REG_FIELD_PREP(LUT_3D_BINDING_MASK, 1)
> +#define   LUT_3D_BIND_PLANE_2
>       REG_FIELD_PREP(LUT_3D_BINDING_MASK, 2)
> +#define   LUT_3D_BIND_PLANE_3
>       REG_FIELD_PREP(LUT_3D_BINDING_MASK, 3)
> +
> +#define _LUT_3D_INDEX_A              0x490A8
> +#define _LUT_3D_INDEX_B              0x491A8
> +#define LUT_3D_INDEX(pipe)   _MMIO_PIPE(pipe, _LUT_3D_INDEX_A,
> _LUT_3D_INDEX_B)
> +#define   LUT_3D_AUTO_INCREMENT              REG_BIT(13)
> +#define   LUT_3D_INDEX_VALUE_MASK    REG_GENMASK(12, 0)
> +#define   LUT_3D_INDEX_VALUE(x)
>       REG_FIELD_PREP(LUT_3D_INDEX_VALUE_MASK, (x))
> +
> +#define _LUT_3D_DATA_A               0x490AC
> +#define _LUT_3D_DATA_B               0x491AC
> +#define LUT_3D_DATA(pipe)    _MMIO_PIPE(pipe, _LUT_3D_DATA_A,
> _LUT_3D_DATA_B)
> +#define   LUT_3D_DATA_RED_MASK               REG_GENMASK(29, 20)
> +#define   LUT_3D_DATA_GREEN_MASK     REG_GENMASK(19, 10)
> +#define   LUT_3D_DATA_BLUE_MASK              REG_GENMASK(9, 0)
> +#define   LUT_3D_DATA_RED(x)
>       REG_FIELD_PREP(LUT_3D_DATA_RED_MASK, (x))
> +#define   LUT_3D_DATA_GREEN(x)
>       REG_FIELD_PREP(LUT_3D_DATA_GREEN_MASK, (x))
> +#define   LUT_3D_DATA_BLUE(x)
>       REG_FIELD_PREP(LUT_3D_DATA_BLUE_MASK, (x))
> +
>  #endif /* __INTEL_COLOR_REGS_H__ */
> --
> 2.50.1

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