> Subject: [v7 09/15] drm/i915: Add register definitions for Plane Post CSC > > Add macros to define Plane Post CSC registers > > BSpec: 50403, 50404, 50405, 50406, 50409, 50410,
I think you missed my last comment this needs to be right above the Signed-off-by > > v2: > - Add Plane Post CSC Gamma Multi Segment Enable bit > - Add BSpec entries (Suraj) > v3: > - Fix checkpatch issues (Suraj) > Here > Signed-off-by: Uma Shankar <[email protected]> > Signed-off-by: Chaitanya Kumar Borah <[email protected]> With that Fixed Reviewed-by: Suraj Kandpal <[email protected]> > --- > .../i915/display/skl_universal_plane_regs.h | 67 +++++++++++++++++++ > 1 file changed, 67 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h > b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h > index 1e5d7ef37f1c..6fd4da9f63cf 100644 > --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h > @@ -254,6 +254,7 @@ > #define PLANE_COLOR_PIPE_CSC_ENABLE REG_BIT(23) > /* Pre-ICL */ > #define PLANE_COLOR_PLANE_CSC_ENABLE REG_BIT(21) > /* ICL+ */ > #define PLANE_COLOR_INPUT_CSC_ENABLE REG_BIT(20) > /* ICL+ */ > +#define PLANE_COLOR_POST_CSC_GAMMA_MULTSEG_ENABLE > REG_BIT(15) /* TGL+ */ > #define PLANE_COLOR_PRE_CSC_GAMMA_ENABLE REG_BIT(14) > #define PLANE_COLOR_CSC_MODE_MASK > REG_GENMASK(19, 17) > #define PLANE_COLOR_CSC_MODE_BYPASS > REG_FIELD_PREP(PLANE_COLOR_CSC_MODE_MASK, 0) > @@ -293,6 +294,72 @@ > > #define _MMIO_PLANE_GAMC(plane, i, a, b) _MMIO(_PIPE(plane, a, b) + (i) * > 4) > > +#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_A 0x70160 > +#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_B 0x71160 > +#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_A 0x70260 > +#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_B 0x71260 > +#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe) > _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_A, \ > + > _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_B) > +#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe) > _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_A, \ > + > _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_B) > +#define PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, i) > _MMIO_PLANE_GAMC(plane, i, > _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe), \ > + > _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe)) > + > +#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_A 0x70164 > +#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_B 0x71164 > +#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_A 0x70264 > +#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_B 0x71264 > +#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_A, \ > + > _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_B) > +#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_A, \ > + > _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_B) > +#define PLANE_POST_CSC_GAMC_SEG0_DATA_ENH(pipe, plane, i) > _MMIO_PLANE_GAMC(plane, i, > _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe), \ > + > _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe)) > + > +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A 0x701d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B 0x711d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A 0x702d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B 0x712d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe) > _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A, \ > + > _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B) > +#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe) > _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A, \ > + > _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B) > +#define PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, i) > _MMIO_PLANE_GAMC(plane, i, > _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe), \ > + > _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe)) > + > +#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_A 0x701dc > +#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_B 0x711dc > +#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_A 0x702dc > +#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_B 0x712dc > +#define _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_DATA_ENH_1_A, \ > + > _PLANE_POST_CSC_GAMC_DATA_ENH_1_B) > +#define _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_DATA_ENH_2_A, \ > + > _PLANE_POST_CSC_GAMC_DATA_ENH_2_B) > +#define PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, i) > _MMIO_PLANE_GAMC(plane, i, > _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe), \ > + > _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe)) > + > +#define _PLANE_POST_CSC_GAMC_INDEX_1_A 0x704d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_1_B 0x714d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_2_A 0x705d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_2_B 0x715d8 > +#define _PLANE_POST_CSC_GAMC_INDEX_1(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_INDEX_1_A, \ > + > _PLANE_POST_CSC_GAMC_INDEX_1_B) > +#define _PLANE_POST_CSC_GAMC_INDEX_2(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_INDEX_2_A, \ > + > _PLANE_POST_CSC_GAMC_INDEX_2_B) > +#define PLANE_POST_CSC_GAMC_INDEX(pipe, plane, i) > _MMIO_PLANE_GAMC(plane, i, > _PLANE_POST_CSC_GAMC_INDEX_1(pipe), \ > + > _PLANE_POST_CSC_GAMC_INDEX_2(pipe)) > + > +#define _PLANE_POST_CSC_GAMC_DATA_1_A 0x704dc > +#define _PLANE_POST_CSC_GAMC_DATA_1_B 0x714dc > +#define _PLANE_POST_CSC_GAMC_DATA_2_A 0x705dc > +#define _PLANE_POST_CSC_GAMC_DATA_2_B 0x715dc > +#define _PLANE_POST_CSC_GAMC_DATA_1(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_DATA_1_A, \ > + > _PLANE_POST_CSC_GAMC_DATA_1_B) > +#define _PLANE_POST_CSC_GAMC_DATA_2(pipe) _PIPE(pipe, > _PLANE_POST_CSC_GAMC_DATA_2_A, \ > + > _PLANE_POST_CSC_GAMC_DATA_2_B) > +#define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i) > _MMIO_PLANE_GAMC(plane, i, > _PLANE_POST_CSC_GAMC_DATA_1(pipe), \ > + > _PLANE_POST_CSC_GAMC_DATA_2(pipe)) > + > #define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_A 0x701d0 > #define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_B 0x711d0 > #define _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_A 0x702d0 > -- > 2.50.1
