From: Heiko Stuebner <[email protected]>

Add the hdmi controller node to the main soc devicetree and hook
it into the vop.

Signed-off-by: Heiko Stuebner <[email protected]>
---
 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 43 ++++++++++++++++++++++++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index ce4b112b082b..892d35242259 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -875,6 +875,11 @@ vop_out_dsi: endpoint@0 {
                                reg = <0>;
                                remote-endpoint = <&dsi_in_vop>;
                        };
+
+                       vop_out_hdmi: endpoint@1 {
+                               reg = <1>;
+                               remote-endpoint = <&hdmi_in_vop>;
+                       };
                };
        };
 
@@ -933,6 +938,37 @@ dphy: phy@ff968000 {
                status = "disabled";
        };
 
+       hdmi: hdmi@ff980000 {
+               compatible = "rockchip,rk3368-dw-hdmi";
+               reg = <0x0 0xff980000 0x0 0x20000>;
+               interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru 
SCLK_HDMI_CEC>;
+               clock-names = "iahb", "isfr", "cec";
+               pinctrl-names = "default";
+               pinctrl-0 = <&hdmi_i2c_xfer>;
+               power-domains = <&power RK3368_PD_VIO>;
+               reg-io-width = <4>;
+               rockchip,grf = <&grf>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       hdmi_in: port@0 {
+                               reg = <0>;
+
+                               hdmi_in_vop: endpoint {
+                                       remote-endpoint = <&vop_out_hdmi>;
+                               };
+                       };
+
+                       hdmi_out: port@1 {
+                               reg = <1>;
+                       };
+               };
+       };
+
        hevc_mmu: iommu@ff9a0440 {
                compatible = "rockchip,iommu";
                reg = <0x0 0xff9a0440 0x0 0x40>,
@@ -1196,6 +1232,13 @@ rmii_pins: rmii-pins {
                        };
                };
 
+               hdmi {
+                       hdmi_i2c_xfer: hdmi-i2c-xfer {
+                               rockchip,pins = <3 RK_PD2 1 &pcfg_pull_none>,
+                                               <3 RK_PD3 1 &pcfg_pull_none>;
+                       };
+               };
+
                i2c0 {
                        i2c0_xfer: i2c0-xfer {
                                rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
-- 
2.47.2

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