This series enables DisplayPort functionality on QCS615 platforms. It introduces the required bindings, updates SM6150 dtsi for DP controller and QMP USB3-DP PHY, and enables DP on the QCS615 Ride board with connector and link configuration.
Depends-on: https://lore.kernel.org/all/20250903-add-display-support-for-qcs615-platform-v8-1-7971c05d1...@oss.qualcomm.com/ https://lore.kernel.org/all/20250916-add-dp-controller-support-for-sm6150-v3-1-dd60ebbd1...@oss.qualcomm.com/ https://lore.kernel.org/all/20250926-add-displayport-support-for-qcs615-platform-v7-1-dc5edaac6...@oss.qualcomm.com/ Signed-off-by: Xiangxu Yin <[email protected]> --- Changes in v2: - Update register padding and ordering [Dmitry] - Rebase the series on the latest driver - Link to v1: https://lore.kernel.org/all/20241210-add-displayport-support-to-qcs615-devicetree-v1-0-02f84a92c...@quicinc.com/ --- Xiangxu Yin (3): dt-bindings: display/msm: Add SM6150 DisplayPort controller arm64: dts: qcom: Add DisplayPort and QMP USB3DP PHY for SM6150 arm64: dts: qcom: Enable DisplayPort on QCS615 Ride platform .../bindings/display/msm/qcom,sm6150-mdss.yaml | 11 +++ arch/arm64/boot/dts/qcom/qcs615-ride.dts | 31 ++++++ arch/arm64/boot/dts/qcom/sm6150.dtsi | 110 ++++++++++++++++++++- 3 files changed, 150 insertions(+), 2 deletions(-) --- base-commit: 52ba76324a9d7c39830c850999210a36ef023cde change-id: 20251014-add-displayport-support-to-qcs615-devicetree-ecaad627a0fa prerequisite-message-id: <20250903-add-display-support-for-qcs615-platform-v8-0-7971c05d1...@oss.qualcomm.com> prerequisite-patch-id: 58be7053007469980bd7cc9fe315b66bbe021c31 prerequisite-patch-id: 3c2120117f72c64f69beff32c0239fbc7f808f36 prerequisite-message-id: <20250916-add-dp-controller-support-for-sm6150-v3-1-dd60ebbd1...@oss.qualcomm.com> prerequisite-patch-id: eb07ea58347e77ee18fb6dade040affb0ab68954 prerequisite-message-id: <20250926-add-displayport-support-for-qcs615-platform-v7-0-dc5edaac6...@oss.qualcomm.com> prerequisite-patch-id: 8c6c905df7ee55a92a4e52362c8fa7cd9742de04 prerequisite-patch-id: 0dba0fafd032bbd6cd117175f61efd1e56ae9228 prerequisite-patch-id: d954b18774cfc0cfdb23de09aab3c56cefb8e1ea prerequisite-patch-id: 13f2d2efbcee6337001b5f8519a6da9a41d05276 prerequisite-patch-id: 3a7144645ede23ccc7d54420e5a32e5bfa3bb776 prerequisite-patch-id: b3ea55e92953c1526eaf7c5c21d939a5f8502711 prerequisite-patch-id: 977189ef7cecbe7237175a8ef611fffb814193b0 prerequisite-patch-id: 3a12c1b4f00eb1d074e51d586f2dae3a44de0613 prerequisite-patch-id: 7f80e93057c1fd088ac6b4b0652cdfe2ea221cd5 prerequisite-patch-id: 8b29d292717782982e4450a509f4428fe6e895f2 prerequisite-patch-id: 621c3ba6bcf5b5782a5264faed72fdadfd47c630 prerequisite-patch-id: 9c63f2c5bb39527e3031b2d168e3c9419441e8df prerequisite-patch-id: 364f6a7d8f4e1bc79a8f236b8d5a2425ffd225fe prerequisite-patch-id: eb09ea48625b5c0d39ffb37babe7d8c32a4b3122 Best regards, -- Xiangxu Yin <[email protected]>
