Hi,
On Fri, Dec 04, 2020 at 03:33:41PM +0800, Liu Ying wrote:
> The Northwest Logic MIPI DSI host controller embedded in i.MX8qxp
> works with a Mixel MIPI DPHY + LVDS PHY combo to support either
> a MIPI DSI display or a LVDS display.  So, this patch calls
> phy_set_mode() from nwl_dsi_enable() to set PHY mode to MIPI DPHY
> explicitly.
> 
> Cc: Guido Günther <[email protected]>
> Cc: Robert Chiras <[email protected]>
> Cc: Martin Kepplinger <[email protected]>
> Cc: Andrzej Hajda <[email protected]>
> Cc: Neil Armstrong <[email protected]>
> Cc: Laurent Pinchart <[email protected]>
> Cc: Jonas Karlman <[email protected]>
> Cc: Jernej Skrabec <[email protected]>
> Cc: David Airlie <[email protected]>
> Cc: Daniel Vetter <[email protected]>
> Cc: NXP Linux Team <[email protected]>
> Signed-off-by: Liu Ying <[email protected]>
> ---
>  drivers/gpu/drm/bridge/nwl-dsi.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c 
> b/drivers/gpu/drm/bridge/nwl-dsi.c
> index 66b6740..be6bfc5 100644
> --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> @@ -678,6 +678,12 @@ static int nwl_dsi_enable(struct nwl_dsi *dsi)
>               return ret;
>       }
>  
> +     ret = phy_set_mode(dsi->phy, PHY_MODE_MIPI_DPHY);
> +     if (ret < 0) {
> +             DRM_DEV_ERROR(dev, "Failed to set DSI phy mode: %d\n", ret);
> +             goto uninit_phy;
> +     }
> +
>       ret = phy_configure(dsi->phy, phy_cfg);
>       if (ret < 0) {
>               DRM_DEV_ERROR(dev, "Failed to configure DSI phy: %d\n", ret);

Reviewed-by: Guido Günther <[email protected]> 
 -- Guido

> -- 
> 2.7.4
> 


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