From: Mihail Atanassov <[email protected]>

When updating the rotation fields, one of the assignments zeroes out the
rest of the register fields, which include settings for chroma siting,
inverse gamma, AMBA AXI caching, and alpha blending.

Signed-off-by: Mihail Atanassov <[email protected]>
Signed-off-by: Liviu Dudau <[email protected]>
---
 drivers/gpu/drm/arm/malidp_planes.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/arm/malidp_planes.c 
b/drivers/gpu/drm/arm/malidp_planes.c
index 629f634872a4..1db8b6977efc 100644
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -219,7 +219,8 @@ static void malidp_de_plane_update(struct drm_plane *plane,
 
        /* setup the rotation and axis flip bits */
        if (plane->state->rotation & DRM_ROTATE_MASK)
-               val = ilog2(plane->state->rotation & DRM_ROTATE_MASK) << 
LAYER_ROT_OFFSET;
+               val |= ilog2(plane->state->rotation & DRM_ROTATE_MASK) <<
+                      LAYER_ROT_OFFSET;
        if (plane->state->rotation & DRM_REFLECT_X)
                val |= LAYER_H_FLIP;
        if (plane->state->rotation & DRM_REFLECT_Y)
-- 
2.11.0

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