> On Apr 8, 2026, at 03:26, Jean Delvare <[email protected]> wrote: > > Hi Matt, > > On Tue, 2026-04-07 at 17:24 +0000, Matt Ochs wrote: >>> On Apr 7, 2026, at 02:47, Jean Delvare <[email protected]> wrote: >>> What led you to believe that this field is relevant to EDSFF slots? >> >> On NVIDIA Vera Rubin systems I’m seeing the Slot Information field >> populated for E1.S (EDSFF E1) slots, and since EDSFF is a PCIe-based >> form factor it seems reasonable to decode and display this as the PCI >> Express generation when the firmware provides a non-zero value. >> >> The SMBIOS 3.9 section 7.10.10 “System Slots — Slot Information” also >> feels a bit vague here with respect to newer form factors like EDSFF, >> so I erred on the side of exposing what firmware actually provides. >> >> That’s what led me to extend dmi_slot_information() to cover C5/C6 in >> the same way as other PCIe slot types. > > OK, that makes sense. > > Would you be able to provide to me (privately) a dump of the DMI table > of one of these systems, so that I can test the patch myself and also > include it in my non-regression test suite?
Yes, I will send you a dump of the table. -matt
