Hi @thierry
I'm trying to apply VTA to Bit Fusion which can calculate dynamic bit range using just one core. Bit Fusion : https://arxiv.org/abs/1712.01507 But when I make Bit Fusion by c code, latency and resource consumption used to be seriously worse than using verilog. So I found HLS Blackbox, which is only available in Vivado HLS 2019.1 or in higher version that cannot generate bitstream files. If VTA bitstream could be generated by 2019.1 or higher version, IMO there are a lot of advantages for applying VTA to other ASIC DNN architecture because ASIC does not have micro kernel. So I am indeed looking for VTA that can be run in 2019.1 or higher version, and I want to know if there are any plans to make VTA compatible with 2019.1 version. --- [Visit Topic](https://discuss.tvm.ai/t/vta-when-could-i-make-vta-bitstream-file-with-hls-blackbox/7651/1) to respond. You are receiving this because you enabled mailing list mode. To unsubscribe from these emails, [click here](https://discuss.tvm.ai/email/unsubscribe/904ad45a53f46ce15b870e7c8b6a3b32105bfbcbe3168a7043ed6bb45ba16b7a).
