On 13/9/21 4:38 pm, Sebastian Huber wrote: > This approach is not limited to memory mapped register blocks.
I think it is. I would like to understand how bus types other than "memory" are specified for a generic device driver that needs to handle bus variability. I am concerned this is bespoke to a limited range of devices and use cases. If this is the case lets understand that. I would be interested to see how the ns16550 driver would be specified and then generated to match how it is currently used: https://git.rtems.org/rtems/tree/bsps/shared/dev/serial/ns16550.c Note, it is selected because it maps to IO instructions and memory mapped IO bus architectures. Chris _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel