Hello all, what is the common practice of interrupt implementation in RTEMS? I wasn't able to find much information in RTEMS BSP manual.
My platform RISC-V has vectored interrupts and exceptions. A cause of an exception or of an interrupt is always available in 'mcause' register. But for interrupts an address of a handlers' table can also be dynamically provided. So, what should I do in order to implement interrupt handlers? What is the consequence of steps when interrupt appears (save stack, make a routine...)? Also, what is a good example of a BSP which implements ISR in a proper way? -- Regards, Denis Obrezkov
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