Hello Joel,
I fully understand.
On Thursday 14 of August 2014 15:44:54 Joel Sherrill wrote:
> Thanks.
>
> I am just worried about reproducibility or the BSP and test results
> combined with licensing and redistribution of the TI support
> code. As long as everyone is comfortable with that, I am as well.
I am not so confortable with that, but license is not problem.
There is no restriction on code to be used in commercial
applications etc. It is intended to be a such support from Ti.
I am not aware/cannot imagine that there is restriction to write
boot loader which jumps to other code for this case.
But it is uncomfortable.
I have information that Google in their proprietary/closed project
based on same MCU only GCC toolchain and achieved linking with
Ti flashing library. So it is possible to write all needed
infrastructure with GCC and OpenOCD and that Ti blob. Cannot put
blob to RTEMS mainline but even RTEMS applications can use it
thanks linking exception. As for Google project, they have not
solved clean separation of bootloader and loaded application
ARM exception/interrupt vectors. We have done that on HW basis
by use of POM module and I have even suggested them and have
in reserve standard jump over secondary vectors table in SRAM.
I hope we can move BSP a little forward. End even if not
I think that it is valuable base to continue on it.
As for reproducibility, we try to gain board for you and preflash
it with setup by Ti tools, if you have interrest.
Then only OpenOCD/HW based debugger and common ARM JTAG
are required to run tests.
Best wishes,
Pavel
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