On Thu, Nov 05, 2026 at 13:34:39 +0100, Michal Prívozník wrote: > On 11/5/26 12:48, Peter Krempa via Devel wrote: > > On Wed, Nov 04, 2026 at 15:32:09 +0000, David Vrabel wrote: > >> Add the pcie-upstream-port and pcie-downstream-port devices to the > >> latest x86_64 capabilities data and update the x-width and x-speed > >> properties to be non-experimental. > >> > >> See QEMU commits 432b3f707a3c (hw/pci-bridge: Make speed and width for > >> PCIe ports non-experimental) and 73962cc5f06a (hw/pci-bridge: Add > >> generic PCIe switch upstream and downstream ports). > >> > >> Signed-off-by: David Vrabel <[email protected]> > >> --- > >> This should be replace with a more comprehensive refresh the the > >> capability data from QEMU. > > > > I'll post a refresh soon. > > > > For formal approach, NACK to this patch as it's not properly generated. > > Since these gets refreshed anyway I was about to merge this one. Anyway, > let's wait for you to refresh caps and I will merge this series > afterwards (dropping this particular patch).
I'd suggest we don't do this as a precedent case. I know that some older dumps were edited but we shouldn't ever do that because then the dumps may show impossible configurations.
