Package: wnpp Severity: wishlist Owner: "أحمد المحمودي" <aelmahmo...@sabily.org>
* Package name : verilator Version : 3.801 Upstream Author : Wilson Snyder <wsny...@wsnyder.org> * URL : http://www.veripool.org/wiki/verilator * License : Artistic-2.0 or LGPL-3 Programming Lang: C++, Perl Description : fast free Verilog simulator Verilator is the fastest free Verilog HDL simulator, and beats many commercial simulators. It compiles synthesizable Verilog (not test-bench code!), plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to generate executable models of CPUs for embedded software design teams. -- أحمد المحمودي (Ahmed El-Mahmoudy) Digital design engineer GPG KeyID: 0xEDDDA1B7 GPG Fingerprint: 8206 A196 2084 7E6D 0DF8 B176 BC19 6A94 EDDD A1B7 -- To UNSUBSCRIBE, email to debian-bugs-dist-requ...@lists.debian.org with a subject of "unsubscribe". Trouble? Contact listmas...@lists.debian.org
