Dussart Alexandre wrote: > Please could you check if lothar (hardware configuration in DrakConf) > supports well your soundcard. > > If it doesn't support well please send me the output of: > pnpdump (as root) > and your hardware name/configuration > > Thank you. > > Alex > -- > MandrakeSoft http://www.mandrakesoft.com/ > --Alexandre My sound card is there but I prefer to compile it into the kernel rather then mess with pnp garbage. I have an AWE 64 Sound Blaster. I am wondering why wont it use the AWE 32 it says it should be able to.. I know this isn't the place really to ask that but what the hey have some hay. ;) Jae
# $Id: pnpdump.c,v 1.20 1999/12/02 22:39:24 fox Exp $ # Release isapnptools-1.20 # This is free software, see the sources for details. # This software has NO WARRANTY, use at your OWN RISK # # For details of this file format, see isapnp.conf(5) # # For latest information and FAQ on isapnp and pnpdump see: # http://www.roestock.demon.co.uk/isapnptools/ # # Compiler flags: -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR # # Trying port address 0273 # Board 1 has serial identifier 9f 07 2b 10 c3 c1 00 8c 0e # (DEBUG) (READPORT 0x0273) (ISOLATE PRESERVE) (IDENTIFY *) (VERBOSITY 2) (CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING # Card 1: (serial identifier 9f 07 2b 10 c3 c1 00 8c 0e) # Vendor Id CTL00c1, Serial Number 120262851, checksum 0x9F. # Version 1.0, Vendor version 1.0 # ANSI string -->Creative SB AWE64 PnP<-- # # Logical device id CTL0042 # Device supports vendor reserved register @ 0x3b # Device supports vendor reserved register @ 0x3d # Device supports vendor reserved register @ 0x3f # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL00c1/120262851 (LD 0 # ANSI string -->Audio<-- # Multiple choice time, choose one only ! # Start dependent functions: priority preferred # IRQ 5. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 1. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 1)) # Next DMA channel 5. # 16 bit DMA only # Logical device is a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0220 # IO base alignment 1 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0330 # Maximum IO base address 0x0330 # IO base alignment 1 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0330)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0388 # Maximum IO base address 0x0388 # IO base alignment 1 bytes # Number of IO addresses required: 4 # (IO 2 (SIZE 4) (BASE 0x0388)) # Start dependent functions: priority acceptable # IRQ 5, 7, 9 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Next DMA channel 5, 6 or 7. # 16 bit DMA only # Logical device is not a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0388 # Maximum IO base address 0x0388 # IO base alignment 1 bytes # Number of IO addresses required: 4 # (IO 2 (SIZE 4) (BASE 0x0388)) # Start dependent functions: priority acceptable # IRQ 5, 7, 9 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Next DMA channel 5, 6 or 7. # 16 bit DMA only # Logical device is a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Start dependent functions: priority acceptable # IRQ 5, 7, 9 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Next DMA channel 5, 6 or 7. # 16 bit DMA only # Logical device is a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Start dependent functions: priority acceptable # IRQ 5, 7, 9 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0388 # Maximum IO base address 0x0388 # IO base alignment 1 bytes # Number of IO addresses required: 4 # (IO 2 (SIZE 4) (BASE 0x0388)) # Start dependent functions: priority acceptable # IRQ 5, 7, 9 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 48 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Start dependent functions: priority acceptable # IRQ 5, 7, 9 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Start dependent functions: priority functional # IRQ 5, 7, 9 or 10. # High true, edge sensitive interrupt (by default) # (INT 0 (IRQ 5 (MODE +E))) # First DMA channel 0, 1 or 3. # 8 bit DMA only # Logical device is a bus master # DMA may execute in count by byte mode # DMA may not execute in count by word mode # DMA channel speed in compatible mode # (DMA 0 (CHANNEL 0)) # Next DMA channel 5, 6 or 7. # 16 bit DMA only # Logical device is a bus master # DMA may not execute in count by byte mode # DMA may execute in count by word mode # DMA channel speed in compatible mode # (DMA 1 (CHANNEL 5)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0220 # Maximum IO base address 0x0280 # IO base alignment 32 bytes # Number of IO addresses required: 16 # (IO 0 (SIZE 16) (BASE 0x0220)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0300 # Maximum IO base address 0x0330 # IO base alignment 16 bytes # Number of IO addresses required: 2 # (IO 1 (SIZE 2) (BASE 0x0300)) # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0388 # Maximum IO base address 0x0394 # IO base alignment 4 bytes # Number of IO addresses required: 4 # (IO 2 (SIZE 4) (BASE 0x0388)) # End dependent functions (NAME "CTL00c1/120262851[0]{Audio }") # (ACT Y) )) # # Logical device id CTL7002 # Device supports vendor reserved register @ 0x3b # Device supports vendor reserved register @ 0x3d # Device supports vendor reserved register @ 0x3f # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL00c1/120262851 (LD 1 # Compatible device id PNPb02f # ANSI string -->Game<-- # Multiple choice time, choose one only ! # Start dependent functions: priority preferred # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0200 # Maximum IO base address 0x0200 # IO base alignment 1 bytes # Number of IO addresses required: 8 # (IO 0 (SIZE 8) (BASE 0x0200)) # Start dependent functions: priority acceptable # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0200 # Maximum IO base address 0x0208 # IO base alignment 8 bytes # Number of IO addresses required: 8 # (IO 0 (SIZE 8) (BASE 0x0200)) # End dependent functions (NAME "CTL00c1/120262851[1]{Game }") # (ACT Y) )) # # Logical device id CTL0022 # Device supports vendor reserved register @ 0x3b # Device supports vendor reserved register @ 0x3d # Device supports vendor reserved register @ 0x3f # # Edit the entries below to uncomment out the configuration required. # Note that only the first value of any range is given, this may be changed if required # Don't forget to uncomment the activate (ACT Y) when happy (CONFIGURE CTL00c1/120262851 (LD 2 # ANSI string -->WaveTable<-- # Multiple choice time, choose one only ! # Start dependent functions: priority preferred # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0620 # Maximum IO base address 0x0620 # IO base alignment 1 bytes # Number of IO addresses required: 4 # (IO 0 (SIZE 4) (BASE 0x0620)) # Start dependent functions: priority acceptable # Logical device decodes 16 bit IO address lines # Minimum IO base address 0x0620 # Maximum IO base address 0x0680 # IO base alignment 32 bytes # Number of IO addresses required: 4 # (IO 0 (SIZE 4) (BASE 0x0620)) # End dependent functions (NAME "CTL00c1/120262851[2]{WaveTable }") # (ACT Y) )) # End tag... Checksum 0x00 (OK) # Returns all cards to the "Wait for Key" state (WAITFORKEY)
