================
@@ -881,3 +881,106 @@ def ANDES_AX45MPV : RISCVProcessorModel<"andes-ax45mpv",
FeatureStdExtV,
FeatureVendorXAndesPerf],
Andes45TuneFeatures>;
+
+def XUANTIE_C910V2 : RISCVProcessorModel<"xt-c910v2",
+ GenericOOOModel,
+ [Feature64Bit,
+ FeatureStdExtI,
+ FeatureStdExtM,
+ FeatureStdExtA,
+ FeatureStdExtF,
+ FeatureStdExtD,
+ FeatureStdExtC,
+ FeatureStdExtZicbom,
----------------
MouseSplinter wrote:
I mean that the `FeatureStdExtZiccif` and 'FeatureStdExtZic64b' are not
explicitly specified at the features list (same as in ours downstream) now, I
need to check whether there may be something wrong or they really aren't
mandatory for xt-c910v2 and xt-c920v2.
https://github.com/llvm/llvm-project/pull/174056
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