================
@@ -241,34 +231,17 @@ def SVLDNF1SW_VNUM : MInst<"svldnf1sw_vnum_{d}", "dPUl", 
"lUl",             [IsL
 def SVLDNF1UW_VNUM : MInst<"svldnf1uw_vnum_{d}", "dPYl", "lUl",             
[IsLoad, IsZExtReturn], MemEltTyInt32,   "aarch64_sve_ldnf1">;
 } //  let SVETargetGuard = "sve", SMETargetGuard = InvalidMode
 
-let SVETargetGuard = "sve,bf16", SMETargetGuard = InvalidMode in {
-  def SVLDNF1_BF      : MInst<"svldnf1[_{2}]",      "dPc",  "b", [IsLoad], 
MemEltTyDefault, "aarch64_sve_ldnf1">;
-  def SVLDNF1_VNUM_BF : MInst<"svldnf1_vnum[_{2}]", "dPcl", "b", [IsLoad], 
MemEltTyDefault, "aarch64_sve_ldnf1">;
-}
-
 // Load one vector, unextended load, non-temporal (scalar base)
-def SVLDNT1 : MInst<"svldnt1[_{2}]", "dPc", "csilUcUsUiUlhfdm", [IsLoad, 
VerifyRuntimeMode], MemEltTyDefault, "aarch64_sve_ldnt1">;
+def SVLDNT1 : MInst<"svldnt1[_{2}]", "dPc", "csilUcUsUiUlhfdbm", [IsLoad, 
VerifyRuntimeMode], MemEltTyDefault, "aarch64_sve_ldnt1">;
 
 // Load one vector, unextended load, non-temporal (scalar base, VL 
displacement)
-def SVLDNT1_VNUM : MInst<"svldnt1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfdm", 
[IsLoad, VerifyRuntimeMode], MemEltTyDefault, "aarch64_sve_ldnt1">;
-
-let SVETargetGuard = "sve,bf16", SMETargetGuard = "sme,bf16" in {
-  def SVLDNT1_BF      : MInst<"svldnt1[_{2}]",      "dPc",  "b", [IsLoad, 
VerifyRuntimeMode], MemEltTyDefault, "aarch64_sve_ldnt1">;
-  def SVLDNT1_VNUM_BF : MInst<"svldnt1_vnum[_{2}]", "dPcl", "b", [IsLoad, 
VerifyRuntimeMode], MemEltTyDefault, "aarch64_sve_ldnt1">;
-}
+def SVLDNT1_VNUM : MInst<"svldnt1_vnum[_{2}]", "dPcl", "csilUcUsUiUlhfdbm", 
[IsLoad, VerifyRuntimeMode], MemEltTyDefault, "aarch64_sve_ldnt1">;
 
 // Load one quadword and replicate (scalar base)
-def SVLD1RQ : SInst<"svld1rq[_{2}]", "dPc", "csilUcUsUiUlhfdm", MergeNone, 
"aarch64_sve_ld1rq", [VerifyRuntimeMode]>;
-
-let SVETargetGuard = "sve,bf16", SMETargetGuard = "sme,bf16" in {
-  def SVLD1RQ_BF : SInst<"svld1rq[_{2}]", "dPc",  "b", MergeNone, 
"aarch64_sve_ld1rq", [VerifyRuntimeMode]>;
-}
+def SVLD1RQ : SInst<"svld1rq[_{2}]", "dPc", "csilUcUsUiUlhfdbm", MergeNone, 
"aarch64_sve_ld1rq", [VerifyRuntimeMode]>;
 
 multiclass StructLoad<string name, string proto, string i, list<FlagType> f = 
[]> {
-  def : SInst<name, proto, "csilUcUsUiUlhfdm", MergeNone, i, !listconcat(f, 
[IsStructLoad])>;
-  let SVETargetGuard = "sve,bf16", SMETargetGuard = "sme,bf16" in {
-    def: SInst<name, proto, "b", MergeNone, i, !listconcat(f, [IsStructLoad])>;
-  }
+  def : SInst<name, proto, "csilUcUsUiUlhfdbm", MergeNone, i, !listconcat(f, 
[IsStructLoad])>;
 }
----------------
paulwalker-arm wrote:

After this change there are a few seemingly redundant class definitions.  I'm 
assuming it is be better to remove them via a separate NFC PR but if you prefer 
it done under this PR then please let me know.

https://github.com/llvm/llvm-project/pull/147795
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