================
@@ -982,8 +982,9 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) {
case ADDRESS_SPACE_SHARED:
Opc = TM.is64Bit() ? NVPTX::cvta_shared_64 : NVPTX::cvta_shared;
break;
- case ADDRESS_SPACE_DSHARED:
- Opc = TM.is64Bit() ? NVPTX::cvta_dshared_64 : NVPTX::cvta_dshared;
+ case ADDRESS_SPACE_SHARED_CLUSTER:
+ Opc = TM.is64Bit() ? NVPTX::cvta_shared_cluster_64
+ : NVPTX::cvta_shared_cluster;
----------------
Artem-B wrote:
> I think throwing the error in ISel is a good place to fail.
It's a convenient place for LLVM developer. It's problematic for the end user.
In general, if we're diagnosing a user error, it must be in a way that's
actionable for the *user*, not for the compiler developer. Diagnostic by
compiler crash is not the best UI.
Granted, producing an invalid instruction and relying on ptxas to diagnose it
is only marginally better.
I think the missing bit of the puzzle here is that we still support 32-bit
compilation on sm_90+. If we make it impossible to do it in principle, then it
makes the whole point moot, and we no longer have to bother with 32-bit generic
pointers for the instructions that are available on newer GPUs only.
This is something to be addressed separately. For this patch, I'm fine with
proceeding with the assumption that 32-bit compilation never happens.
https://github.com/llvm/llvm-project/pull/135444
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