================ @@ -982,8 +982,9 @@ void NVPTXDAGToDAGISel::SelectAddrSpaceCast(SDNode *N) { case ADDRESS_SPACE_SHARED: Opc = TM.is64Bit() ? NVPTX::cvta_shared_64 : NVPTX::cvta_shared; break; - case ADDRESS_SPACE_DSHARED: - Opc = TM.is64Bit() ? NVPTX::cvta_dshared_64 : NVPTX::cvta_dshared; + case ADDRESS_SPACE_SHARED_CLUSTER: + Opc = TM.is64Bit() ? NVPTX::cvta_shared_cluster_64 + : NVPTX::cvta_shared_cluster; ---------------- modiking wrote:
> The check here is for TM.is64Bit() not whether shared memory is 64 or 32 > bits. Ah I see. Agreed then that 32-bit `cvta.*shared::cluster` shouldn't exist as a valid construct during ISel. I think throwing the error in ISel is a good place to fail. ptxas will complain if we give it a 32-bit target machine on sm90+: ``` ptxas fatal : 32-Bit ABI (--machine 32 or 32-Bit addressing) is not supported on sm_90 or higher architectures. ``` But given that a 32-bit version doesn't exist we shouldn't generate one. We should also update the documentation that `cvta.*shared::cluster` is 64 bit only as well: https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvta https://github.com/llvm/llvm-project/pull/135444 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits