================ @@ -3107,6 +3107,23 @@ let TargetPrefix = "aarch64" in { } } + class SME_OuterProduct_TMOP_Intrinsic + : DefaultAttrsIntrinsic<[], + [llvm_i32_ty, + llvm_anyvector_ty, + LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_nxv16i8_ty, + llvm_i32_ty], + [ImmArg<ArgIndex<0>>, ImmArg<ArgIndex<5>>, + IntrInaccessibleMemOnly]>; + + def int_aarch64_sme_tmopa : SME_OuterProduct_TMOP_Intrinsic; ---------------- CarolineConcatto wrote:
I notice that we cannot make any difference between Za32 and Za16 when lowering. We need to have another aarch64_sme_tmopa. So maybe: aarch64_sme_z32_tmopa aarch64_sme_z16_tmopa I would also change the other ones that are only needed for z32 bits to be: s/ int_aarch64_sme_stmopa /int_aarch64_sme_za32_stmopa/g s/ int_aarch64_sme_utmopa /int_aarch64_sme_za32_utmopa/g s/ int_aarch64_sme_sutmopa /int_aarch64_sme_za32_sutmopa/g s/ int_aarch64_sme_ustmopa /int_aarch64_sme_za32_ustmopa/g https://github.com/llvm/llvm-project/pull/135145 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits