================ @@ -535,21 +540,29 @@ RISCVMCCodeEmitter::getImmOpValueSlist(const MCInst &MI, unsigned OpNo, } } -uint64_t -RISCVMCCodeEmitter::getImmOpValueAsr1(const MCInst &MI, unsigned OpNo, +template <unsigned N> +unsigned +RISCVMCCodeEmitter::getImmOpValueAsrN(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const { const MCOperand &MO = MI.getOperand(OpNo); if (MO.isImm()) { - uint64_t Res = MO.getImm(); - assert((Res & 1) == 0 && "LSB is non-zero"); - return Res >> 1; + unsigned Res = MO.getImm(); ---------------- lenary wrote:
Why are you discarding the upper bits of the immediate? https://github.com/llvm/llvm-project/pull/135110 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits