================ @@ -5763,9 +5806,13 @@ class sme2_fp64_quarter_tile_outer_product<bit M, bit N, bit S, string mnemonic, let Constraints = "$ZAda = $_ZAda"; } -multiclass sme2_fmop4as_fp64_non_widening<bit S, string mnemonic> { +multiclass sme2_fmop4as_fp64_non_widening<bit S, string mnemonic, string op> { // Single vectors - def _MZZ_D : sme2_fp64_quarter_tile_outer_product<0, 0, S, mnemonic, ZPR64Mul2_Lo, ZPR64Mul2_Hi>; + def _MZZ_D : sme2_fp64_quarter_tile_outer_product<0, 0, S, mnemonic, ZPR64Mul2_Lo, ZPR64Mul2_Hi>, SMEPseudo2Instr<NAME # _MZZ_D, 1>; + + def NAME # _MZZ_D # _PSEUDO : sme2_quarter_tile_outer_product_pseudo_single_single<ZPR64Mul2_Lo, ZPR64Mul2_Hi, SMEMatrixTileD>, SMEPseudo2Instr<NAME # _MZZ_D, 0>; + + def : SME2_ZA_Tile_TwoVec_Pat<NAME # _MZZ_D, !cast<SDPatternOperator>(op # "_1x1"), timm32_0_3, nxv2f64>; ---------------- CarolineConcatto wrote:
I believe that here timm32_0_3 should be timm32_0_7. "Double-precision, single vectors" variants: is the name of the ZA tile ZA0-ZA7, encoded in the "ZAda" field. From: https://developer.arm.com/documentation/ddi0602/2024-12/SME-Instructions/FMOP4A--non-widening---Floating-point-quarter-tile-outer-products--accumulating-?lang=en https://github.com/llvm/llvm-project/pull/127797 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits